Designers of integrated circuits rely upon computer simulation models to predict the behavior of transistor devices in silicon. The failure of a computer simulation model to accurately predict actual circuit behavior could result in a non-working design or a design that does not perform to specification, potentially resulting in costly design iteration. Accordingly, it is desirable for device manufacturers to publish accurate simulation models so that devices perform as modeled.
In developing a computer simulation model of a transistor, model parameters are often observed empirically, by physically constructing the device to be modeled and then measuring the circuit's output response to applied input voltages and/or waveforms. A particular model parameter of interest is a transistor's body effect. The body effect can be measured indirectly by observing a transistor circuit's behavior while varying a bias voltage applied to the transistor's body terminal. If the transistor device is a floating body device with no body terminal, it is not possible to apply a bias voltage to the device's body to measure the body effect of the device. The traditional solution to this limitation is to mimic the floating body transistor using an equivalent transistor device that has a body tie. A drawback of the traditional solution is that the conventional body tie distorts the bias voltage applied to the transistor body, so the actual bias voltage applied to the transistor body is not known. This leads to a reduction in the accuracy of the transistor's computer simulation model. By constructing a body tie test structure that reduces or eliminates the body bias distortion seen in the conventional body tie design, a more accurate computer simulation model for a floating body transistor can be realized.